The present invention relates to a method of fabricating a semiconductor device and, more particularly, to a method of fabricating a semiconductor device, in which a dual trench structure can be easily formed in a high voltage region by using a passivation film.
In non-volatile memory devices such as flash memory devices, a high voltage is used in order to perform erase and write operations. To use this high voltage, a high voltage transistor capable of passing or switching the high voltage is used.
A process of forming a high voltage transistor having a general dual trench structure is as follows. A gate insulating layer for insulation is formed over a semiconductor substrate. A pad layer for protecting underlying layers is formed on the gate insulating layer. A hard mask pattern in which a trench region is opened is formed on the pad layer. An etch process is performed along the hard mask pattern, thus patterning the pad layer and the gate insulating layer. An exposed semiconductor substrate is removed to form a first trench.
In order to form a dual trench structure, a photoresist is formed over the semiconductor substrate in which the first trench is formed. The photoresist is a fluid material and is thus formed along the surface of the semiconductor substrate including the trench and the pad layer. Accordingly, it is difficult to form the photoresist thickly because a subsequent exposure process must be performed. If the photoresist is formed thick, not only the exposure process along the pattern, but also a development process is difficult. For this reason, the photoresist is formed thin. In particular, the photoresist is formed thin at the corners of the pad layer.
At the time of an ion implantation process performed on the semiconductor substrate in which a subsequent second trench is formed, an impurity can be implanted into the photoresist film. The impurity can be implanted into the core regions of the pad layer in which the thickness of the photoresist is thin. If the impurity is implanted into the pad layer, electrical properties may vary when the semiconductor device is operated subsequently. It may result in degraded reliability of the semiconductor device.